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Saxena Prashant

Routing Congestion in VLSI Circuits:Estimation and Optimization / Prashant Saxena, Rupesh S.Shelar and Sachin S.Sapatnekar - New Delhi Springer 2007 - xiv, ; 248p. Paperback; 23 cm.

ISBN: 9788184893885

ISSN: 9969

Subjects--Topical Terms:
Logic Design, VLSI 621.395;

Dewey Class. No.: 621.395 / SAX

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