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Statistical Analysis and Optimization for VLSI:Timing and Power
by Srivastava Ashish
Additional authors:
Sylvester DennisBlaauw David
Series:
Springer
Published by :
Springer
(New Delhi)
Physical details: ix, ; 279p.
ISBN:9788181288578.
ISSN:9983
Subject(s):
Logic Design, VLSI 621.395;
Year: 2005
| Item type | Current location | Collection | Call number | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|
Books
|
RYMEC
Rao Bahadur Y. Mahabaleswarappa Engineering College Cantonment BALLARI |
Electronics and Communication Engineering | 621.395 SRI (Browse shelf) | Reference | 087864 | ||
|
Books
|
RYMEC
Rao Bahadur Y. Mahabaleswarappa Engineering College Cantonment BALLARI |
Electronics and Communication Engineering | 621.395 SRI (Browse shelf) | Reference | 087865 | ||
|
Books
|
RYMEC
Rao Bahadur Y. Mahabaleswarappa Engineering College Cantonment BALLARI |
Electronics and Communication Engineering | 621.395 SRI (Browse shelf) | Available | 087866 |
Total holds: 0
Browsing RYMEC Shelves , Shelving location: General , Collection code: Electronics and Communication Engineering Close shelf browser
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| 621.395 SHA VLSI Design | 621.395 SHA VLSI Design | 621.395 SRI Statistical Analysis and Optimization for VLSI:Timing and Power | 621.395 SRI Statistical Analysis and Optimization for VLSI:Timing and Power | 621.395 SRI Statistical Analysis and Optimization for VLSI:Timing and Power | 621.395 SZE VLSI Technology | 621.395 THO The Verilog Hardware Description Language |
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