TY  - BOOK
AU  - Saxena Prashant
AU  - Shelar Rupesh S.Sapatnekar Sachin S.
TI  - Routing Congestion in VLSI Circuits:Estimation and Optimization
SN  - 9788184893885
SN  - 9969
U1  - 621.395             
PY  - 2007///
CY  - New Delhi
PB  - Springer
KW  - Logic Design, VLSI 621.395
ER  -